This is Hejia Zhang, a 2nd-year PhD student in CSE at UCSD, California. I’m current doing AI4EDA and MLsys related research advised by Prof. Jishen Zhao.

My current research interests include:

1. LLM for better Ditigal Verification and Hardware Design;
2. Improving performance and efficiency of LLM coding agents.

I was a hardware developer at Akuna Capital, developing low-latency trading system based on SystemVerilog & C++. Before that, I got my bachelor’s degree from Department of EE, Tsinghua University.

Selected Publications

LLM4Cov: Execution-Aware Agentic Learning for High-coverage Testbench Generation
Hejia Zhang, Zhongming Yu, Chia-Tung Ho, Haoxing Ren, Brucek Khailany, Jishen Zhao
In the Proceedings of the 43rd International Conference on Machine Learning (ICML), 2026
[code] [website] [huggingface]

MAGE: A Multi-Agent Engine for Automated RTL Code Generation
Yujie Zhao*, Hejia Zhang*, Hanxian Huang, Zhongming Yu, Jishen Zhao
In the Proceedings of the 62nd ACM/IEEE Design Automation Conference (DAC), 2025
* stands for equal contribution
[code] [website] [poster]

OrcaLoca: An LLM Agent Framework for Software Issue Localization
Zhongming Yu*, Hejia Zhang*, Yujie Zhao, Hanxian Huang, Matrix Yao, Ke Ding, Jishen Zhao
In the Proceedings of the 42nd International Conference on Machine Learning (ICML), 2025
* stands for equal contribution
[code] [website]

Other Publications

(Accepted by DAC 2026) PRO-V-R1: Reasoning Enhanced Programming Agent for RTL Verification
(Accepted by COLM 2026) FinHardBench: Can LLMs Generate Latency-Aware Hardware for Financial Computing?

Services: Program Committee Member & Reviewer

International Conference on Machine Learning (ICML) 2026 (Gold Reviewer)
Annual AAAI Conference on Artificial Intelligence (AAAI) 2027
Transactions on Machine Learning Research (TMLR) 2026
NSF Workshop on Agents for Chip Design Automation (Agent4Chip) 2026 (Program Committee)